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  supertex inc. hv9803 supertex inc. www.supertex.com doc.# dsfp-hv9803nr012313 features ? fast average current control ? correction for propagation delay and offset voltage ? fixed off-time switching mode ? linear dimming input ? pwm dimming input ? output short circuit protection with programmable skip mode ? input under-voltage shutdown applications ? backlighting of lcd panels ? general lighting general description the hv9803 is an open loop average-mode current control led driver ic operating in a constant off-time mode. the ic features 2% current accuracy, tight line and load regulation of the led current without any need for loop compensation or high-side current sensing. its auto-zero circuit cancels the effect of both the input offset voltage and the propagation delay in the current sense comparator. the hv9803 can be powered from a 7.0~13.2v supply. the ic features fast pwm dimming response. the linear dimming input ld can accept a reference voltage up to 2.5v. the ic is equipped with a current limit comparator for hiccup-mode output short circuit protection. it also features a programmable input under-voltage shutdown. typical application circuit led driver ic with average-mode constant current control +v in 7.0~13.2v r cs r t ref dim r 2 r 1 c skip hv9803 vdd pwmdld uvlo gate cs rt gnd c dd c in d 1 l 1 q 1 downloaded from: http:///
2 hv9803 supertex inc. www.supertex.com doc.# dsfp-hv9803nr012313 -g denotes a lead (pb)-free / rohs compliant packageabsolute maximum ratings* stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the speciications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. parameter value vdd, gate, cs -0.3v to +14v ld, rt, pwmd, uvlo -0.3v to +6.0v junction temperature range -40c to +150c storage temperature range -65c to +150c power dissipation @ 25c 650mw sym description min typ max units conditions input v dd input dc supply voltage range * - - 13.2 v dc input voltage i dd quiescent vdd supply current * - 1.5 2.5 ma v cs = 0v vdd under-voltage lockout v dd(uv) v dd under-voltage lockout threshold * 6.45 6.70 6.95 v v dd rising v dd(uv) v dd under-voltage lockout hysteresis - - 500 - mv v dd falling pwm dimming v en(lo) pwmd input low voltage * - - 1.0 v --- v en(hi) pwmd input high voltage * 2.6 - - v --- r en internal pull-down resistance at pwmd - 50 100 150 k --- ordering information part number package option packing hv9803lg-g 8-lead soic 2500/reel pin coniguration product marking 8-lead soic 8-lead soic electrical characteristics (the * denotes speciications which apply over the full operating ambient temperature range of -40c< t a <125c. otherwise speciications are at t a = 25c. v dd = 12v, pwmd = 5.0v, unless otherwise noted) typical thermal resistance package ja 8-lead soic 101 o c/w package may or may not include the following marks: si or y = year sealed ww = week sealed l = lot number = ?green? packaging yw w h9803 llll 1 2 3 4 8 7 6 5 cs vdd gnd gate lduvlo pwmd rt downloaded from: http:///
3 hv9803 supertex inc. www.supertex.com doc.# dsfp-hv9803nr012313 sym description min typ max units conditions current sense comparator v ld external reference voltage - 0 - 3.0 v --- v cs cs reference voltage * 762 778 794 mv v ld = 1.6v * 955 975 995 v ld = 2.0v a v(ld) ld to cs voltage ratio - - 0.49 - - --- t blank current sense blanking interval * 150 - 280 ns --- t on(min) minimum on-time - - - 760 ns v cs = 0.5v ld +30mv d max maximum steady-state duty cycle * 80 - - % reduction in output led current may occur beyond this duty cycle short circuit protection v lim internal current reference - 1.57 - 1.93 v --- t delay current limit delay cs-to-gate - - - 150 ns v cs = v lim +30mv r uvlo(r) uvlo skip timer reset switch resistance - - - 500 --- v uvlo(r) uvlo skip timer reset voltage - 200 - 300 mv --- t on(min) minimum on-time (short circuit) - - - 430 ns v cs = v lim +30mv t off timer t off off time - 6.7 9.0 11.3 s r t = 250k? 0.8 1.0 1.2 s r t = 25k? i rt(lim) rt over-current threshold - - 2.8 - ma --- gate driver i source gate sourcing current - 0.165 - - a v gate = 0v i sink gate sinking current - 0.165 - - a v gate = v dd t rise gate output rise time - - 30 50 ns c gate = 500pf t fall gate output fall time - - 30 50 ns c gate = 500pf uvlo uvlo under-voltage threshold voltage * 1.17 - 1.29 v v uvlo rising uvlo under-voltage threshold voltage hysteresis - - 150 - mv v uvlo falling electrical characteristics (cont.) (the * denotes speciications which apply over the full operating ambient temperature range of -40c 4 hv9803 supertex inc. www.supertex.com doc.# dsfp-hv9803nr012313 functional block diagramgeneral peak-current control of a buck converter is the most economical and simple way to regulate its output current. however, it suffers accuracy and regulation problems that arise from the peak-to-average current error, contributed to by the current ripple in the output inductor and the propagation delay in the current sense comparator. the full inductor current signal is unavailable for direct sensing at the ground potential in a buck converter when the control switch is referenced to the same ground potential. while it is very simple to detect the peak current in the switch, controlling the average inductor current is usually implemented by level-translating the current sense signal from the positive input supply rail. while this is practical for relatively low input voltage, this type of average-current control may become excessively complex and expensive in the case of input voltage in excess of 100v. the hv9803 employs supertex patented control scheme, achieving fast and very accurate control of average current in the buck inductor through sensing the switch current only. no compensation of the current control loop is required. the inductor current ripple amplitude does not affect this control scheme signiicantly, and therefore, the led current is independent of the variation in inductance, switching frequency or output voltage. constant off-time control of the buck converter is used for stability and to improve the led current regulation over a wide range of input voltages. the ic features excellent pwm dimming response. functional description vdd ld cs gnd toff timer r q s q q s r average-mode control logic auto-ref xa v(ld) por current mirror v lim i i + - - + + - + - uvlogate pwmd rt skip reset out in skip uvlo1 v ld uvlo2 reset i rt (lim) 250mv hv9803 6.0mv l/e blanking downloaded from: http:///
5 hv9803 supertex inc. www.supertex.com doc.# dsfp-hv9803nr012313 off timer in the hv9803, the timing resistor connected to rt determines the off-time of the gate driver, and it must be wired to gnd. the equation governing the off-time of the gate output is given by: t off = r t ? 40pf the r t input is protected from short circuit. over-current condition at r t inhibits the ic. current sense comparator and timer circuits the function of the hv9803s current sense comparator is similar to that of a peak current controller. however, the gate pulse is not terminated immediately as the ld threshold is met. the gate turn off in the n th cycle is delayed by a time t 2,n determined by a timer circuit as follows: t 2,n = 1 ? (t 1,n + t 1,n-1 ) 2 where t 1,n and t 1,n-1 are the times to the ld threshold in any two consequent switching cycles. this iterative control law is needed for damping sub-harmonic oscillation. note, that the above control law is only valid up to a maximum switching duty cycle d max = 0.8. exceeding d max will cause reduction in the led current. propagation delay in the current sense comparator is one of the most signiicant contributors to the led current error. it must be noted that the control scheme described above does not improve this deiciency of the peak-current control scheme by itself. moreover, it samples the propagation delay during t 1 and replicates it during t 2 , essentially doubling the error introduced by this delay. in order to eliminate this error, the reference voltage is corrected by an auto-zero circuit. in essence, the hv9803 samples its cs signal when the current sense comparator triggers, detects the difference between the sampled cs level and the reference input of the current sense comparator. the resulting difference is subtracted from the reference level to generate a new reference in the next switching cycle. gate output the gate output of the hv9803 is used to drive an external mosfet. it is recommended that the gate charge q g of the external mosfet be less than 25nc for switching frequencies 100khz and less than 15nc for switching frequencies >100khz. the resulting led current is calculated from the equation: i led = 0.49 ? v ld - 6mv r cs short circuit protection the hv9803 is equipped with a protection comparator having a cs threshold v lim . when this second threshold is triggered, the gate output shuts off for the duration of a restart delay, determined by the rc constant at uvlo. the capacitor c skip is discharged below 200mv. a restart delay due to charging c skip to the uvlo start threshold is calculated as: where k = r 2 /(r 1 +r 2 ) . under-voltage shutdown under-voltage comparator input is provided to disable the ic, when the uvlo input is below a threshold. hysteresis is provided to avoid oscillation. failure modes and effects analysis (fmea) the hv9803 is designed to withstand short circuit between its adjacent pins without damage. the following table describes the effect of such incidental short circuit conditions. short circuit mode effect cs to vdd the ic triggers the short circuit protection and operates in the auto- restart mode continuously. vdd to gnd short circuit across the 12v should cause the external bias supply over- current protection. gnd to gate should cause the external bias supply over-current protection. the power mosfet q1 is off. rt to pwmd case 1 C pwmd = lo: the rt pin sources its maximum current. gate = 0v, and q1 is off. case 2 C pwmd=hi: the rt pin is pulled up, shutting off the timer. gate is off. pwmd to uvlo this will overdrive the under-voltage threshold. however, since v in uv condition is harmless to the ic, there is no effect. uvlo to ld ld overdrives the uvlo. if ld is lower than the uvlo threshold, the ic shuts off. no effect otherwise. t ski p = k ? r 1 ? c ski p ? ln k ? v in - 0.30v k ? v in - 1.17v downloaded from: http:///
6 hv9803 supertex inc. www.supertex.com doc.# dsfp-hv9803nr012313 pin name description 1 cs this pin is the current sense pin used to detect the mosfet source current by means of an external sense resistor. 2 vdd this is the power supply input for the gate output and input of the low-voltage regulator powering the internal logic. it must be bypassed with a low esr capacitor to gnd (at least 0.1f). 3 gnd ground return for all internal circuitry. this pin must be electrically connected to the ground of the power train. 4 gate this pin is the output gate driver for an external n-channel power mosfet. 5 rt a resistor connected between rt and gnd programs the gate off-time. 6 pwmd this is the pwm dimming input of the ic. when this pin is pulled to gnd, the gate driver is turned off. when the pin is pulled high, the gate driver operates normally. 7 uvlo this pin is the under-voltage comparator input. it is also used to form a short-circuit protection skip delay. 8 ld this pin is the reference voltage input for programming the led current. pin description (8-lead soic) downloaded from: http:///
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate ?product liability indemnification insurance agreement.? supertex inc . does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc . (website: http//www .supertex.com) ?2013 supertex inc. all rights reserved. unauthorized use or reproduction is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www.supertex.co m 7 hv9803 (the package drawing(s) in this data sheet may not relect the most current speciications. for the latest package outline information go to http://www.supertex.com/packaging.html .) doc.# dsfp-hv9803nr012313 8-lead soic (narrow body) package outline (lg) 4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch 1 8 seating plane gauge plane l l1 l2 e e1 d e b a a2 a1 seating plane a a top vi ew side view vi ew b view b 1 note 1 (index area d/2 x e1/2) vi ew a-a h h note 1 symbol a a1 a2 b d e e1 e h l l1 l2 1 dimension (mm) min 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80* 1.27 bsc 0.25 0.40 1.04 ref 0.25 bsc 0 o 5 o nom - - - - 4.90 6.00 3.90 - - - - max 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00* 0.50 1.27 8 o 15 o jedec registration ms-012, variation aa, issue e, sept. 2005. * this dimension is not speciied in the jedec drawing. drawings are not to scale. supertex doc. #: dspd-8solgtg, version i041309. note: 1. this chamfer feature is optional. a pin 1 identiier must be located in the index area indicated. the pin 1 identiier can be: a molded mark/identiier; an embedded metal marker; or a printed indicator. downloaded from: http:///


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